The present invention relates to a method for fabricating a semiconductor device, and more particularly, to a method for fabricating a capacitor in a semiconductor device.
As semiconductor devices are being developed toward large-scale of integration, miniaturization and high-speed, areas for capacitors are decreasing. However, despite this developmental trend, capacitors need to have a minimum level of capacitance to drive semiconductor devices. Recently, as semiconductor devices are being scaled down to several nanometers, the height of an inter-layer where capacitors are to be formed increases to secure the capacitance of capacitors.
FIG. 1 is a sectional view to illustrate a conventional method for fabricating a capacitor. A first inter-layer insulation layer 12 is formed on a substrate 11, and landing contact plugs 13 passing through the first inter-layer insulation layer 12 are formed over the substrate 11. A second inter-layer insulation layer 14 is formed on the first inter-layer insulation layer 12 and the landing contact plugs 13, and etched to form storage node contact holes (not shown). Storage node contact plugs 15 filling the storage node contact holes are formed. An etch barrier layer 16 and a bottom electrode isolation layer 17 are formed over the above resultant structure. The bottom electrode isolation layer 17 and the etch barrier layer 16 are etched to form opening regions X where bottom electrodes are to be formed.
In general, a height H of the bottom electrode isolation layer 17 is increased to obtain an intended level of capacitance. However, due to the large-scale of integration, the height H of the bottom electrode isolation layer 17 needs to increase in order to obtain a sufficient level of capacitance. Due to the increase in the height H of the bottom electrode isolation layer 17, remnants are more likely to be generated when the bottom electrode isolation layer 17 and the etch barrier layer 16 are etched. As a result, the etching may not further proceed as reference denotation B illustrates. Alternatively, even if the etching proceeds, a bottom area of the opening region X may become narrowed as reference denotation A illustrates.